In the synchronous counter, the state of each JK flip-flop is determined by the current state of the J and K terminals "When all low bits are all 1, the flip-flop J=K=1". Another more common structural design of theĬounter is the synchronous counter, as shown in Figure 3: The JK flip-flops of all bits are driven by the same clock source CLK. The sequential logic circuit of the asynchronous counter. A 4-bit asynchronous addition counter based on JK flip-flop is shown in Figure 2 below.įigure 2. Because the JK flip-flop clock source of all bits in this type of counter is not the same clock source, it is called an asynchronous counter. At the same time, because the output waveform of each bit is the two-frequency division of the adjacent low-order waveform, the adjacent low-order JK flip-flop output can be used as the clock source of the local JK flip-flop, so that the adjacent low-order signal state edge jumps (such as falling At the moment of edge), the status of the local signal reverses. Therefore, the output signal of each bit of the counter is easily generated by a JK flip-flop. View Image Asynchronous/synchronous counterĪs shown in Figure 1 above, the output waveform of each bit of the counter is a square wave, that is, the levels of "0" and "1" alternate, and the level interval is the same. On the other hand, the design of the counter can also refer to the waveform of the counter bit signal in Figure 1.įigure 1: Schematic diagram of the output waveform of a 3-digit binary counter
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Therefore, on the one hand, the counter can be used as a frequency divider. Similarly, in the n-bit binary counter, any Qn terminal is a two-frequency division of the adjacent low-order Qn-1 terminal. Frequency division and quarter frequency division at Q0. As shown in Figure 1, the waveforms of Q0, Q1, and Q2 are aligned along the time axis, and it can be seen that the counter bits are divided by frequency: Q1 is the frequency division of the lower Q0 end, and Q2 is the second of the lower Q1 end. Assuming a 3-bit binary counter, its counting range is 000~111, driven by the input clock pulse CP, its state is: 000, 001, 010. One of the most important circuit types in sequential logic circuits is the counter, whose main function is to count the number of input clock pulses. Correspondingly, a circuit composed of flip-flops is called a sequential logic circuit, and its output is not only a combination of input signals, but also a function of the current state of the circuit.
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